This is a second part and continuation of Huffman encoding/decoding implementation in Xilinx ISE project. For the first part see Huffman Encoder/Decoder using Xilinx ISE. If readers require Xilinx ISE, visit this blogpost download Xilinx ISE v14.6 or download Xilinx ISE v14.3.
3. Implementation of Huffman Coding
3.1 Huffman Implementation on Xilinx FPGA for MPEG 2:
The following block diagram shows the implementation of Huffman coding on Xilinx:
3.2 Tables for Encoder & Decoder:
The following tables are the variable length code tables or LUT for Huffman implementation:
1. Table for Quantization Level:
2. VCL Table for Encoding DC coefficients a. Luminance VCL Table
b. Chrominance VCL Table
3. VCL Table for Encoding AC coefficients a. Non Intra-Coded Blocks
b. Intra Coded Blocks
4. Table for Decoding DC coefficients
5. Table for Decoding AC coefficients
1. Table for Quantization Level:
2. VCL Table for Encoding DC coefficients
a. Luminance VCL Table
b. Chrominance VCL Table
3. VCL Table for Encoding AC coefficients:
a. Non Intra-Coded Blocks
b. Intra-Coded Blocks
4. Table for Decoding DC coefficients:
Three predictor values are maintained for each color component. The predictor values are set at the start of the slice, or when a non-intra macroblock is decoded, or when a macroblock is skipped. The predictor values for different intra_dc_precisions are shown in Table below:
5. Table for Decoding AC coefficients:
The run/level pair is decoded from the Huffman code using a look-up table (LUT). There are three possible options for the Huffman code. If the code represents an EOB, all the remaining coefficients are set to "0". If the code represents an escape code, the next six bits represent the run and the following 12 bits represent the level. If the VLC denotes a normal coefficient, then the run coefficients are set to zero and the following level coefficient is set to the level value depending on the value of s. When s == 0, the signed level is the same as level. When s == 1, the signed level is equal to (–level).
3. Implementation of Huffman Coding
3.1 Huffman Implementation on Xilinx FPGA for MPEG 2:
The following block diagram shows the implementation of Huffman coding on Xilinx:
The following tables are the variable length code tables or LUT for Huffman implementation:
1. Table for Quantization Level:
2. VCL Table for Encoding DC coefficients a. Luminance VCL Table
b. Chrominance VCL Table
3. VCL Table for Encoding AC coefficients a. Non Intra-Coded Blocks
b. Intra Coded Blocks
4. Table for Decoding DC coefficients
5. Table for Decoding AC coefficients
1. Table for Quantization Level:
2. VCL Table for Encoding DC coefficients
a. Luminance VCL Table
a. Non Intra-Coded Blocks
b. Intra-Coded Blocks
4. Table for Decoding DC coefficients:
Three predictor values are maintained for each color component. The predictor values are set at the start of the slice, or when a non-intra macroblock is decoded, or when a macroblock is skipped. The predictor values for different intra_dc_precisions are shown in Table below:
The run/level pair is decoded from the Huffman code using a look-up table (LUT). There are three possible options for the Huffman code. If the code represents an EOB, all the remaining coefficients are set to "0". If the code represents an escape code, the next six bits represent the run and the following 12 bits represent the level. If the VLC denotes a normal coefficient, then the run coefficients are set to zero and the following level coefficient is set to the level value depending on the value of s. When s == 0, the signed level is the same as level. When s == 1, the signed level is equal to (–level).
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